May 2026 — Present
Embedded Software Engineer
Houdini SDR Project, Wireless Lab, Rice University · Houston, TX
Started as an internship (May to Jul 2026) and continuing as a research project on Houdini, an NSF-funded, open-access, multi-band (CBRS, X-band, Ku-band, V-band) software-defined radio platform for networking, sensing, and imaging research, built on the Xilinx/AMD RFSoC 4x2.
- Diagnosed an ADF4371 PLL that would not lock on the XUD1A board by tracing the schematic and finding it defaulted to an external LO reference. Fixed it by changing one capacitor to route the internal LO, validating first in a PYNQ Python driver
- Wrote and customized the Linux IIO driver for the ADF4371 and integrated it into Houdini's PetaLinux build, with test software that confirms PLL lock by streaming ADC/DAC data
- Established a verified X-band loopback (IF 4.5 GHz, LO 14.5 GHz, RF 10.0 GHz)
- Designed the schematic for a 4-layer Altium power/control board for a phased-array RF front end (enable sequencing, SPDT switching, current sensing, level translation, ESD protection). A Python netlist check caught six defects before fabrication, and bring-up confirmed the power supply works
- Fixed the Vivado/PetaLinux build pipeline (port mismatches, corrupted device tree overlays, stale sstate cache)
- Now benchmarking chirp linearity and wideband chirp bandwidth, and measuring received-signal phase delay at 3.8 GHz and 4.5 GHz as a step toward range measurement